Integrated circuit chips have been used widely in recent years to form electrical circuits which provide functions not previously capable of being attained. The integrated circuits have been formed by providing substrates on which a plurality of layers have been deposited to form a wafer. Electrical components or sub-assemblies have then been attached to the wafers to form integrated circuits. The electrical components are ordinarily not compatible with the wafers to which they are attached. The wafer surface has accordingly been cleaned and prepared to receive successive depositions of materials which will make the wafer surface compatible with the electrical components or sub-assemblies. For example, successive operations may be as follows:
1. A cleaning of the wafer surface as by etching;
2. A deposition of a layer of chromium on the wafer surface;
3. A deposition of a layer of nickel vanadium on the layer of chromium;
4. A deposition on the layer of nickel vanadium of a layer of a metal selected from the group consisting of copper, gold and silver; and
5. A soldering of the electrical component to the layer of the metal selected from the group consisting of copper, gold and silver.
The use of the successive layers as discussed above has been practiced for some time. However, there are problems in the use of these successive layers. A major problem has been that the electrical component or sub-assembly has not been permanently adhered to the wafer even with the use of all of the different layers specified above. The lack of permanent adherence results in part from the heat produced by the soldering of the metal layer to the electrical component and from thermal shock. Lack of permanent adherence may be seen by scratching the surfaces of the different layers specified above and/or by bending the layers. A low adherence of the different layers leads to a lack of repeatability in the operating characteristics of the assembly including the wafer and the electrical component or assembly.